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19-1045; Rev 0; 10/07
KIT ATION EVALU ILABLE AVA
Low-Cost Multiple-Output Power Supply for LCD TVs
General Description Features
o Optimized for 10.8V to 13.2V Input Supply o 8V to 16.5V Input Supply Range o Selectable Frequency (600kHz/1.2MHz) o Current-Mode Step-Up Regulator Built-In 20V, 3.3A, 110m n-Channel MOSFET High-Accuracy Output Voltage (1%) True Shutdown Fast Load-Transient Response High Efficiency 3ms Internal Soft-Start o Current-Mode Step-Down Regulator Built-In 20V, 2.5A, 120m n-Channel MOSFET Fast Load-Transient Response Adjustable Output Voltage Down to 1.25V Skip Mode at Light Load High Efficiency 3ms Internal Soft-Start o Adjustable Positive and Negative Charge-Pump Regulators o Soft-Start and Timer-Delay Fault Latch for All Outputs o Logic-Controlled High-Voltage Integrated Switches with Adjustable Delay o Two High-Speed Operational Amplifiers 150mA Short-Circuit Current 100V/s Slew Rate 20MHz, -3dB Bandwidth o 120m p-Channel FET for AVDD Sequencing o Input Undervoltage Lockout and ThermalOverload Protection o 48-Pin, 7mm x 7mm Thin QFN Package
MAX17014
The MAX17014 multiple-output power-supply controller generates all the supply rails for thin-film transistor (TFT) liquid-crystal display (LCD) panels in TVs and monitors operating from a regulated 12V input. It includes a step-down and a step-up regulator, a positive and a negative charge pump, two operational amplifiers, and a Dual ModeTM logic-controlled highvoltage switch control block. The MAX17014 can operate from 8V to 16.5V input voltages and is optimized for LCD TV panel and LCD monitor applications running directly from 12V supplies. The step-up and step-down regulators feature internal power MOSFETs and high-frequency operation allowing the use of small inductors and capacitors, resulting in a compact solution. Both switching regulators use fixed-frequency current-mode control architectures, providing fast load-transient response and easy compensation. A current-limit function for internal switches and output-fault shutdown protect the step-up and step-down power supplies against fault conditions. The MAX17014 provides soft-start functions to limit inrush current during startup. The MAX17014 provides adjustable power-up timing. The positive and negative charge-pump regulators provide TFT gate driver supply voltages. Both output voltages can be adjusted with external resistive voltage-dividers. The switch control block allows the manipulation of the positive TFT gate driver voltage. The MAX17014 includes two high-current operational amplifiers designed to drive the LCD backplane (VCOM). The amplifier features high output current (150mA), fast slew rate (100V/s), wide bandwidth (20MHz), and rail-to-rail inputs and outputs. A series p-channel MOSFET is integrated to sequence power to AV DD after the MAX17014 has proceeded through normal startup, and provides True ShutdownTM. The MAX17014 is available in a small (7mm x 7mm), low-profile (0.8mm), 48-pin thin QFN package and operates over a -40C to +85C temperature range.
Ordering Information
PART TEMP RANGE -40C to +85C PINPACKAGE 48 Thin QFN 7mm x 7mm PKG CODE T4877+3
Applications
LCD TV Panels LCD Monitor Panels
MAX17014ETM+
+Denotes a lead-free package.
Dual Mode is a trademark of Maxim Integrated Products, Inc. True Shutdown is a trademark of Maxim Integrated Products, Inc.
Simplified Operating Circuit and Pin Configuration appear at end of data sheet.
1
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
Low-Cost Multiple-Output Power Supply for LCD TVs MAX17014
ABSOLUTE MAXIMUM RATINGS
VIN, IN2, OVIN, SUP, EN1, EN2, FSEL to GND ......-0.3V to +22V GND1, OGND, CPGND to GND .........................................0.3V MODE, DLP, CTL, THR, DEL1, DEL2, VL to GND ...-0.3V to +7.5V REF, FBP, FBN, FB1, FB2, COMP, OUT to GND ...........................................-0.3V to (VVL + 0.3V) SWI, SWO to GND ..................................................-0.3V to +22V LX1 to GND1 ..........................................................-0.3V to +22V SWI to SWO ............................................................-0.3V to +22V SWI to SUI .............................................................-0.3V to +7.5V POS1, NEG1, OUT1, POS2, NEG2, OUT2 to OGND ...................................-0.3V to (VOVIN + 0.3V) DRVN, DRVP to CPGND ...........................-0.3V to (VSUP + 0.3V) LX2 to CPGND ...........................................-0.3V to (VIN2 + 0.3V) BST to VL................................................................-0.3V to +22V SRC to GND ...........................................................-0.3V to +48V GON, DRN to GND ...................................-0.3V to (VSRC + 0.3V) GON to DRN...........................................................-0.3V to +48V POS_ to NEG_ RMS Current ...................................5mA (Note 1) Note 1: See Figure 6 for the op amp clamp structures.
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
REF Short Circuit to GND ...........................................Continuous RMS LX1 Current (total for both pins) ...................................3.2A RMS GND1 Current (total for both pins) ...............................3.2A RMS IN2 Current (total for both pins)....................................3.2A RMS LX2 Current (total for both pins) ...................................3.2A RMS CPGND Current............................................................0.8A RMS SWI Current ..................................................................2.4A RMS SWO Current ................................................................2.4A RMS DRVN, DRVP Current ...................................................0.8A RMS VL Current ..................................................................50mA Continuous Power Dissipation (TA = +70C) 48-Pin Thin QFN (derate 38.5mW/C above +70C) .........................3076.9mW Operating Temperature Range ...........................-40C to +85C Junction Temperature ......................................................+160C Storage Temperature Range .............................-65C to +165C Lead Temperature (soldering, 10s) .................................+300C
ELECTRICAL CHARACTERISTICS
(Circuit of Figure 1, VIN = IN2 = 12V, AVDD = OVIN = SUP = 15V, TA = 0C to +85C. Typical values are at TA = +25C, unless otherwise noted.)
PARAMETER GENERAL VIN, IN2 Input Voltage Range VIN + IN2 Quiescent Current VIN + IN2 Standby Current VIN + IN2 Shutdown Current SUP + OVIN Shutdown Current SMPS Operating Frequency Phase Difference Between StepDown/Positive and Step-Up/Negative Regulators VIN Undervoltage Lockout Threshold VL REGULATOR VL Output Voltage VL Undervoltage Lockout Threshold I VL = 25mA, VFB1 = VFB2 = VFBP = 1.1V, VFBN = 0.4V (all regulators switching) VL rising edge, 100mV typical hysteresis 4.9 3.5 5.0 3.9 5.1 4.3 V V VIN rising edge, 100mV typical hysteresis 5.75 Only LX2 switching (VFB1 = VFBP = 1.5V, VFBN = 0); EN1 = EN2 = VL, VFSEL = 0 LX2 not switching (VFB1 = VFB2 = VFBP = 1.5V, VFBN = 0); EN1 = EN2 = VL, VFSEL = 0 EN1 = EN2 = GND (shutdown) EN1 = EN2 = GND (shutdown) FSEL = VIN FSEL = GND 1020 510 8.0 8 2 300 10 1200 600 180 1380 690 16.5 V mA mA A A kHz CONDITIONS MIN TYP MAX UNITS
Degrees
6.50
7.25
V
2
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Low-Cost Multiple-Output Power Supply for LCD TVs
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, VIN = IN2 = 12V, AVDD = OVIN = SUP = 15V, TA = 0C to +85C. Typical values are at TA = +25C, unless otherwise noted.)
PARAMETER REFERENCE REF Output Voltage REF Load Regulation REF Sink Current REF Undervoltage Lockout Threshold STEP-DOWN REGULATOR OUT Voltage in Fixed Mode FB2 Voltage in Adjustable Mode FB2 Adjustable-Mode Threshold Voltage Output Voltage Adjust Range FB2 Fault Trip Level FB2 Input Leakage Current DC Load Regulation DC Line Regulation LX2-to-IN2 nMOS Switch On-Resistance LX2-to-CPGND nMOS Switch On-Resistance BST-to-VL PMOS Switch On-Resistance Low-Frequency Operation OUT Threshold Low-Frequency Operation Switching Frequency LX2 Positive Current Limit Soft-Start Period Soft-Start Step Size Maximum Duty Factor STEP-UP REGULATOR Output Voltage Range Oscillator Maximum Duty Cycle Minimum t ON FB1 Regulation Voltage FB1 Fault Trip Level FB1 = COMP, CCOMP = 1nF Falling edge 0C < TA < +85C TA = +25C 1.235 1.2375 0.96 1.00 VVIN 69 75 70 1.25 1.265 1.2625 1.04 20 81 V % ns V V 70 Step-down only FSEL = VIN FSEL = GND 2.50 6 7 FB2 = GND, no load (Note 2) VOUT = 2.5V, no load (Note 2) Dual-mode comparator Step-down output Falling edge VFB2 = 1.5V 0A < ILOAD < 2A No load, 10.8V < VIN2 < 13.2V 0C < TA < +85C TA = +25C 0C < TA < +85C TA = +25C 3.25 3.267 1.23 1.2375 0.10 1.5 0.96 50 1.00 125 0.5 0.1 120 10 12 0.8 217 108 3 3 VREF / 128 80 90 3.50 240 23 20 V kHz A ms V % 0.15 1.25 3.30 3.35 3.333 1.27 1.2625 0.20 5.0 1.04 200 V V V V V nA % %/V m No external load 0 < ILOAD < 50A In regulation Rising edge; 20mV typical hysteresis 10 1.0 1.2 1.235 1.250 1.265 10 V mV A V CONDITIONS MIN TYP MAX UNITS
MAX17014
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Low-Cost Multiple-Output Power Supply for LCD TVs MAX17014
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, VIN = IN2 = 12V, AVDD = OVIN = SUP = 15V, TA = 0C to +85C. Typical values are at TA = +25C, unless otherwise noted.)
PARAMETER FB1 Load Regulation FB1 Line Regulation FB1 Input Bias Current FB1 Transconductance FB1 Voltage Gain LX1 Leakage Current LX1 Current Limit Current-Sense Transresistance LX1 On-Resistance Soft-Start Period Soft-Start Step Size POSITIVE AND NEGATIVE CHARGE-PUMP REGULATORS SUP Input Supply Range SUP Input Supply Current SUP Overvoltage Threshold FBP Regulation Voltage FBP Line-Regulation Error FBP Input Bias Current DRVP p-Channel MOSFET On-Resistance DRVP n-Channel MOSFET On-Resistance FBP Fault Trip Level Positive Charge-Pump Soft-Start Period Positive Charge-Pump Soft-Start Step Size FBN Regulation Voltage FBN Input Bias Current FBN Line Regulation Error DRVN p-Channel On-Resistance DRVN n-Channel On-Resistance FBN Fault Trip Level Negative Charge-Pump Soft-Start Negative Charge-Pump Soft-Start Step Size Rising edge 450 VREF - VFBN VFBN = 0mV 11V < V SUP < 16V, not in dropout 1.0 0.5 500 3 (VREF VFBN) / 128 0C < TA < +85C TA = +25C 0.988 0.99 -50 Falling edge 0.96 VFBP = 1.5V, VFBN = 0.15V (not switching) SUP rising edge, 250mV typical hysteresis (Note 3) 0C < TA < +85C TA = +25C 11V < V SUP < 16V, not in dropout VFBP = 1.5V -50 1.0 0.5 1.00 3 VREF / 128 1.000 1.00 1.012 1.01 +50 0.2 3.0 1.0 550 mV ms V 8.0 0.2 18 1.23 1.2375 19 1.25 18.0 0.4 20 1.27 1.2625 0.2 +50 3.0 1.0 1.04 V ms V V nA %/V V mA V V %/V nA CONDITIONS 0 < ILOAD < full, transient only 10.8V < V VIN < 13.2V VFB1 = 1.25V I = 2.5A at COMP, FB1 = COMP FB1 to COMP VFB1 = 1.5V, VLX1 = 20V VFB1 = 1.1V, duty cycle = 25% 3.2 0.16 25 150 MIN TYP -1 0.08 125 320 1400 4 3.7 0.23 110 3 ILIM / 128 40 4.2 0.30 220 0.15 200 560 MAX UNITS % %/V nA S V/V A A V/A m ms A
4
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Low-Cost Multiple-Output Power Supply for LCD TVs
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, VIN = IN2 = 12V, AVDD = OVIN = SUP = 15V, TA = 0C to +85C. Typical values are at TA = +25C, unless otherwise noted.)
PARAMETER AVDD SWITCH SWI Supply Range SWI Overvoltage Fault Threshold SWI-SWO Switch Resistance SUI-SWI Pullup Resistance SUI Output Sink Current SWI-SUI Done Threshold OPERATIONAL AMPLIFIERS OVIN Supply Range OVIN Overvoltage Fault Threshold OVIN Supply Current Input Offset Voltage Input Bias Current Input Common-Mode Voltage Range Input Common-Mode Rejection Output Voltage Swing High Output Voltage Swing Low Large-Signal Voltage Gain Slew Rate -3dB Bandwidth Short-Circuit Current HIGH-VOLTAGE SWITCH ARRAY SRC Supply Range SRC Supply Current GON-to-SRC Switch On-Resistance GON-to-DRN Switch On-Resistance GON-to-DRN Switch Saturation Current GON-to-GND Switch On-Resistance CTL Input Low Voltage CTL Input High Voltage CTL Input Current CTL-to-GON Rising Propagation Delay CTL-to-GON Falling Propagation Delay MODE Switch On-Resistance CTL = GND or VL 1k from DRN to GND, CTL = GND to VL step, no load on GON, measured from VCTL = 2V to GON = 20% 1k from DRN to GND, CTL = VL to GND step, no load on GON, measured from VCTL = 0.6V to GON = 80% 1.6 -1 100 100 1250 +1 VDLP = 2V, CTL = VL 150 75 2.5 VDLP = 2V, CTL = GND (VGON - VDRN) > 5V DLP = GND, VGON = 5V GON-to-SRC Switch Saturation Current (VSRC - VGON) > 5V 200 10 390 20 180 6.0 12.5 0.6 50 mA k V V A ns ns 44 500 20 mA V A OVIN rising edge, 250mV typical hysteresis (Note 3) Buffer configuration, VPOSx = VOVIN / 2, no load 2V < (VNEGx, VPOSx) < (VOVIN - 2V), TA = +25C 2V < (VNEGx, VPOSx) < (VOVIN - 2V) 2V < (VNEGx, VPOSx) < (VOVIN - 2V) I OUTx = 25mA I OUTx = -25mA 2V < (VNEGx, VPOSx) < (VOVIN - 2V) 2V < (VNEGx, VPOSx) < (VOVIN - 2V) 2V < (VNEGx, VPOSx) < (VOVIN - 2V) Short to V OVIN / 2, sourcing Short to V OVIN / 2, sinking -10 -1 0 100 VOVIN - VOVIN 300 150 150 80 100 20 150 250 300 8 18 19 4.2 18 20 6 +10 +1 VOVIN V V mA mV A V dB mV mV dB V/s MHz mA EN2 = GND EN2 = DEL2 = VL EN2 = DEL2 = VL 24 4.4 SWI rising edge, 250mV typical hysteresis (Note 3) CONDITIONS MIN 8.0 18.50 19.25 120 30 30 5.0 36 5.6 A V TYP MAX 18.5 20.00 240 UNITS V V m
MAX17014
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Low-Cost Multiple-Output Power Supply for LCD TVs MAX17014
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, VIN = IN2 = 12V, AVDD = OVIN = SUP = 15V, TA = 0C to +85C. Typical values are at TA = +25C, unless otherwise noted.)
PARAMETER Mode 1 Voltage Threshold MODE Capacitor Charge Current (Mode 2) MODE Voltage Threshold for Enabling DRN Switch Control in Mode 2 MODE Current-Source Stop Voltage Threshold THR-to-GON Voltage Gain SEQUENCE CONTROL EN1, EN2, Input Low Voltage EN1, EN2 Input High Voltage EN1, EN2 Pulldown Resistance DEL1, DEL2, DLP Charge Current DEL1, DEL2, DLP Turn-On Threshold DEL1, DEL2, DLP Discharge Switch On-Resistance FBN Discharge Switch On-Resistance FAULT DETECTION Duration to Trigger Fault Duration to Restart After Fault Number of Restart Attempts Before Shutdown Thermal-Shutdown Threshold FSEL Input Low Voltage FSEL Input High Voltage FSEL Pulldown Resistance 15C typical hysteresis 600kHz 1.2MHz 1.6 1 SWITCHING FREQUENCY SELECTION 0.6 V V M 50 160 3 +160 ms ms Times C EN1 = GND or fault tripped EN2 = GND or fault tripped VDEL1 = VDEL2 = VDLP = 1V 6 1.19 1.6 1 8 1.25 10 3 k 10 1.31 0.6 V V M A kV VMODE rising edge VMODE < MODE current-source stop voltage threshold 40 50 CONDITIONS MIN TYP MAX 4.5 60 UNITS V A
GON connects to DRN
1.20
1.25
1.30
V
MODE rising edge
2 9.4 10.0
3 10.6
V V/V
6
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Low-Cost Multiple-Output Power Supply for LCD TVs
ELECTRICAL CHARACTERISTICS
(Circuit of Figure 1, VIN = IN2 = 12V, AVDD = OVIN = SUP = 15V, TA = -40C to +85C. Typical values are at TA = +25C, unless otherwise noted.) (Note 4)
PARAMETER GENERAL VIN, IN2 Input Voltage Range SMPS Operating Frequency VIN Undervoltage Lockout Threshold VL REGULATOR VL Output Voltage VL Undervoltage Lockout Threshold REFERENCE REF Output Voltage REF Load Regulation REF Undervoltage Lockout Threshold STEP-DOWN REGULATOR OUT Voltage in Fixed Mode FB2 Voltage in Adjustable Mode FB2 Adjustable-Mode Threshold Voltage Output Voltage Adjust Range LX2-to-IN2 nMOS Switch On-Resistance LX2-to-CPGND nMOS Switch On-Resistance BST-to-VL pMOS Switch On-Resistance LX2 Positive Current Limit Maximum Duty Factor STEP-UP REGULATOR Output Voltage Range Oscillator Maximum Duty Cycle FB1 Regulation Voltage LX1 Current Limit Current-Sense Transresistance LX1 On-Resistance FB1 = COMP, CCOMP = 1nF VFB1 = 1.1V, duty cycle = 25% VVIN 69 1.23 3.2 0.16 20 81 1.27 4.2 0.30 220 V % V A V/A m 6 7 2.50 70 FB2 = GND, no load (Note 2) VOUT = 2.5V, no load (Note 2) Dual-mode comparator Step-down output 3.25 1.23 0.10 1.5 3.35 1.27 0.20 5.0 240 23 20 3.50 90 A % V V V V m No external load 0 < ILOAD < 50A Rising edge; 20mV typical hysteresis 1.235 1.265 10 1.2 V mV V I VL = 25mA, VFB1 = VFB2 = VFBP = 1.1V, VFBN = 0.4V (all regulators switching) VL rising edge, 100mV typical hysteresis 4.9 3.5 5.1 4.3 V V FSEL = VIN FSEL = GND VIN rising edge, 100mV typical hysteresis 8.0 1020 510 5.75 16.5 1380 690 7.25 V kHz V CONDITIONS MIN TYP MAX UNITS
MAX17014
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Low-Cost Multiple-Output Power Supply for LCD TVs MAX17014
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, VIN = IN2 = 12V, AVDD = OVIN = SUP = 15V, TA = -40C to +85C. Typical values are at TA = +25C, unless otherwise noted.) (Note 4)
PARAMETER VSUP Input Supply Range VSUP Overvoltage Threshold FBP Regulation Voltage DRVP p-Channel MOSFET On-Resistance DRVP n-Channel MOSFET On-Resistance FBN Regulation Voltage DRVN p-Channel On-Resistance DRVN n-Channel On-Resistance AVDD SWITCH SWI Supply Range SWI Overvoltage Fault Threshold SWI-SWO Switch Resistance SUI Output Sink Current SWI-SUI Done Threshold OPERATIONAL AMPLIFIERS OVIN Supply Range OVIN Overvoltage Fault Threshold Input Common-Mode Voltage Range Output Voltage Swing High Output Voltage Swing Low HIGH-VOLTAGE SWITCH ARRAY SRC Supply Range GON-to-SRC Switch On-Resistance GON-to-DRN Switch On-Resistance GON-to-GND Switch On-Resistance CTL Input Low Voltage CTL Input High Voltage Mode 1 Voltage Threshold VMODE rising edge 1.6 4.5 VDLP = 2V, CTL = VL VDLP = 2V, CTL = GND DLP = GND, VGON = 5V 2.5 44 20 50 12.5 0.6 k V V V V I OUTx = 25mA I OUTx = -25mA SWI rising edge, 250mV typical hysteresis (Note 2) 8 18 0 VOVIN 300 300 18 20 VOVIN V V V mV mV EN2 = DEL2 = VL EN2 = DEL2 = VL 24 4.4 VOVIN = rising, 250mV typical hysteresis (Note 3) 8.0 18.5 18.5 20.0 240 36 5.6 V V m A V VREF - VFBN 0.985 SUP rising edge, 250mV typical hysteresis (Note 3) CONDITIONS MIN 8 18 1.23 TYP MAX 18 20 1.27 3 1 1.015 3 1 V UNITS V V V
POSITIVE AND NEGATIVE CHARGE-PUMP REGULATORS
8
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Low-Cost Multiple-Output Power Supply for LCD TVs
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, VIN = IN2 = 12V, AVDD = OVIN = SUP = 15V, TA = -40C to +85C. Typical values are at TA = +25C, unless otherwise noted.) (Note 4)
PARAMETER MODE Voltage Threshold for Enabling DRN Switch Control in Mode 2 MODE Current-Source Stop Voltage Threshold THR-to-GON Voltage Gain SEQUENCE CONTROL EN1, EN2 Input Low Voltage EN1, EN2 Input High Voltage SWITCHING FREQUENCY SELECTION FSEL Input Low Voltage FSEL Input High Voltage 600kHz 1.2MHz 1.6 0.6 V V 1.6 0.6 V V CONDITIONS GON connects to DRN MODE rising edge MIN 1.2 2 9.4 TYP MAX 1.3 3 10.6 UNITS V V V/V
MAX17014
Note 2: When the inductor is in continuous conduction (EN2 = VL or heavy load), the output voltage has a DC regulation level lower than the error comparator threshold by 50% of the output voltage ripple. In discontinuous conduction (EN2 = GND with light load), the output voltage has a DC regulation level higher than the error comparator threshold by 50% of the output voltage ripple. Note 3: Disables boost switching if either SUP, SWI, or OVIN exceeds the threshold. Switching resumes when no threshold is exceeded. Note 4: Specifications to -40C are guaranteed by design, not production tested.
Typical Operating Characteristics
(Circuit of Figure 1. VIN = VINL = VSUPP = 12V, AVDD = 16V, VGON = 34.5V, VGOFF = -6V, VOUT1 = 3.3V, TA = +25C, unless otherwise noted.)
STEP-DOWN REGULATOR EFFICIENCY vs. LOAD CURRENT
MAX17014 toc01
STEP-DOWN REGULATOR OUTPUT VOLTAGE vs. LOAD CURRENT
EN1 = VL, EN2 = GND 3.325
MAX17014 toc02
STEP-DOWN REGULATOR LOAD TRANSIENT RESPONSE
MAX17014 toc03
85 80 75 EFFICIENCY (%) 70 65 60 55 50 0.01 0.1 1 EN1 = VL, EN2 = VL EN1 = VL, EN2 = GND
3.350
A 3.3V
OUTPUT VOLTAGE (V)
3.300 3.275
2A 0.1A B
3.250 EN1 = VL, EN2 = VL 3.225 3.200
C 0A
0 0.40 0.80 1.20 1.60 2.00 2.40
10
10s/div A: VOUT, 100mV/div B: LOAD CURRENT, 2A/div C: INDUCTOR CURRENT, 1A/div
LOAD CURRENT (A)
LOAD CURRENT (A)
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Low-Cost Multiple-Output Power Supply for LCD TVs MAX17014
Typical Operating Characteristics (continued)
(Circuit of Figure 1. VIN = VINL = VSUPP = 12V, AVDD = 16V, VGON = 34.5V, VGOFF = -6V, VOUT1 = 3.3V, TA = +25C, unless otherwise noted.)
STEP-DOWN REGULATOR SOFT-START (HEAVY LOAD)
MAX17014 toc04
STEP-UP REGULATOR EFFICIENCY vs. LOAD CURRENT
A B 95 90 EFFICIENCY (%) 85 80 75 70 65 60 55 50 45 40 0.001 AVDD (V) 16.06
MAX17014 toc05
STEP-UP REGULATOR OUTPUT VOLTAGE vs. LOAD CURRENT
MAX17014 toc06
100
16.10
16.08
0V 0V C 0A D 0V A: VIN, 5V/div B: VOUT, 1V/div 4.00ms/div C: INDUCTOR CURRENT, 500mA/div D: VLX2, 10V/div
16.04
16.02
16.00 0.01 0.1 1 10 0 0.5 1.0 1.5 2.0 2.5 LOAD CURRENT (A) LOAD CURRENT (A)
STEP-UP REGULATOR SOFT-START (HEAVY LOAD)
MAX17014 toc07
STEP-UP REGULATOR LOAD-TRANSIENT RESPONSE
MAX17014 toc08
STEP-UP REGULATOR PULSED LOAD-TRANSIENT RESPONSE
MAX17014 toc09
A B C D
A 50mA 16V B
A 0.2A 16V B
E C 0A A: EN2, 5V/div B: DEL2, 5V/div C: AVDD, 5V/div 10.00ms/div D: VSUI, 5V/div E: INDUCTOR CURRENT, 1.00A/div 20.0s/div A: LOAD CURRENT, C: INDUCTOR CURRENT, 1A/div 2A/div B: AVDD, 200mV/div 10.0s/div A: LOAD CURRENT, C: INDUCTOR CURRENT, 1A/div 2A/div B: AVDD, 200mV/div C 0A
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Low-Cost Multiple-Output Power Supply for LCD TVs
Typical Operating Characteristics (continued)
(Circuit of Figure 1. VIN = VINL = VSUPP = 12V, AVDD = 16V, VGON = 34.5V, VGOFF = -6V, VOUT1 = 3.3V, TA = +25C, unless otherwise noted.)
STEP-UP REGULATOR CURRENT LIMIT vs. INPUT VOLTAGE
L1 = 4.7H (CDEP134NP-4R8M, ISAT = 9.3A)
MAX17014 toc10
MAX17014
TIME-DELAY LATCH RESPONSE TO OVERLOAD
MAX17014 toc11
SWITCHING FREQUENCY vs. INPUT VOLTAGE
MAX17014 toc12
6.0 5.5 STEP-UP CURRENT LIMIT (A) 5.0 AVDD = 16V 4.5 4.0 3.5 3.0 AVDD = 18V 2.5 8 9 10 11 12 13 14 15
1.200 A 0V B 0V C 0V D SWITCHING FREQUENCY (MHz)
1.198
1.196
1.194
1.192
E 0V 16 200ms/div A: VOUT, 5V/div D: VGOFF, 5V/div B: VAVDD, 10V/div E: L1 INDUCTOR CURRENT, C: VGON, 50V/div 5A/div
1.190 8 9 10 11 VIN (V) 12 13 14
INPUT VOLTAGE (V)
VL LOAD REGULATION
MAX17014 toc13
REFERENCE VOLTAGE LOAD REGULATION
EN1 = EN2 = VL 1.250 REFERENCE VOLTAGE (V) 1.249 1.248 1.247 1.246 1.245 EN1 = EN2 = GND -0.07 VSRC (%) -0.01
MAX17014 toc14
POSITIVE CHARGE-PUMP REGULATOR NORMALIZED LINE REGULATION
MAX17014 toc15
5.05 5.04 5.03 5.02 VL (V) 5.01 5.00 4.99 4.98 4.97 4.96 4.95 0 20 40 60 80 EN1 = EN2 = GND EN1 = EN2 = VL
1.251
0.05
0.02 ISRC = 0A
-0.04 ISRC = 25mA
-0.10 0 50 100 LOAD CURRENT (A) 150 200 10 11 12 13 14 VIN (V) 15 16 17 18
100
LOAD CURRENT (mA)
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Low-Cost Multiple-Output Power Supply for LCD TVs MAX17014
Typical Operating Characteristics (continued)
(Circuit of Figure 1. VIN = VINL = VSUPP = 12V, AVDD = 16V, VGON = 34.5V, VGOFF = -6V, VOUT1 = 3.3V, TA = +25C, unless otherwise noted.)
POSITIVE CHARGE-PUMP REGULATOR NORMALIZED LOAD REGULATION
MAX17014 toc16
POSITIVE CHARGE-PUMP REGULATOR LOAD-TRANSIENT RESPONSE
MAX17014 toc17
NEGATIVE CHARGE-PUMP REGULATOR NORMALIZED LINE REGULATION
MAX17014 toc18
0.4 0 -0.4 -0.8 -1.2 -1.6 -2.0 0 25 50 75 100 125
0.25
OUTPUT VOLTAGE ERROR (%)
A 34.8V
OUTPUT VOLTAGE ERROR (%)
0.05
-0.15
70mA
-0.35
B 10mA
-0.55
-0.75 150 40.0s/div A: VSRC, 100mV/div B: LOAD CURRENT, 20mA/div 9 10 11 12 13 14 15 16 LOAD CURRENT (mA) VIN (V)
NEGATIVE CHARGE-PUMP REGULATOR NORMALIZED LOAD REGULATION
MAX17014 toc19
NEGATIVE CHARGE-PUMP REGULATOR LOAD-TRANSIENT RESPONSE
MAX17014 toc20
POWER-UP SEQUENCE
MAX17014 toc21
0.2 0 -0.2 -0.4 -0.6 -0.8 -1.0 -1.2 0 50 100 150 200
OUTPUT VOLTAGE ERROR (%)
A -6V
A 0V 0V 0V B C
110mA B 10mA
0V 0V 0V VEN2 = VL 20.0ms/div A: VEN1, 5V/div B: VOUT, 5V/div C: VDEL1, 5V/div D: VGOFF, 5V/div
D E F G
250
LOAD CURRENT (mA)
20.0s/div A: VGOFF, 100mV/div B: LOAD CURRENT, 65mA/div
E: VAVDD, 10V/div F: VDEL2, 5V/div G: VSRC, 20V/div
12
______________________________________________________________________________________
Low-Cost Multiple-Output Power Supply for LCD TVs
Typical Operating Characteristics (continued)
(Circuit of Figure 1. VIN = VINL = VSUPP = 12V, AVDD = 16V, VGON = 34.5V, VGOFF = -6V, VOUT1 = 3.3V, TA = +25C, unless otherwise noted.) OPERATIONAL AMPLIFIER OPERATIONAL AMPLIFIER RAIL-TO-RAIL OPERATIONAL AMPLIFIER LARGE-SIGNAL RESPONSE INPUT/OUTPUT LOAD-TRANSIENT RESPONSE
MAX17014 toc22 MAX17014 toc23 MAX17014 toc24
MAX17014
A
50mA A 0mA A -50mA 0V
0V
B 8V
B
B
0V 4.0s/div A: INPUT SIGNAL, 5V/div B: OUTPUT SIGNAL, 5V/div 200ns/div A: OUTPUT CURRENT, 50mA/div B: OUTPUT VOLTAGE, 500mV/div 400ns/div A: INPUT SIGNAL, 5V/div B: OUTPUT SIGNAL, 5V/div
0V
OPERATIONAL AMPLIFIER SMALL-SIGNAL RESPONSE
MAX17014 toc25
VIN SUPPLY CURRENT vs. VIN VOLTAGE
EN1 = EN2 = VL 5 VIN SUPPLY CURRENT (mA) A 0V 4 3 2 EN1 = EN2 = GND 1 0
MAX17014 toc26
INL SUPPLY CURRENT vs. TEMPERATURE
MAX17014 toc27
6
3.5 3.0 INL SUPPLY CURRENT (mA) 2.5 2.0 1.5 1.0 0.5 0 EN1 = EN2 = GND EN1 = VL, EN2 = GND
B 0V 100ns/div A: INPUT SIGNAL, 200mV/div B: OUTPUT SIGNAL, 200mV/div
8
9
10
11
12
13
14
15
16
-40
-15
10
35
60
85
VIN VOLTAGE (V)
TEMPERATURE (C)
HIGH-VOLTAGE SWITCH CONTROL FUNCTION (MODE 1)
MAX17014 toc28
HIGH-VOLTAGE SWITCH CONTROL FUNCTION (MODE 2)
MAX17014 toc29
A 0V B 0V C
A 0V B 0V C CGON = 2.2nF
CGON = 2.2nF A: VCTL, 5V/div B: VMODE, 5V/div 4.00s/div C: VGON, 10V/div
0V 4.00s/div A: VCTL, 5V/div B: VMODE, 2V/div C: VGON, 10V/div
0V
______________________________________________________________________________________
13
Low-Cost Multiple-Output Power Supply for LCD TVs MAX17014
Pin Description
PIN 1 2 3 NAME POS1 OUT1 THR Operational Amplifier 1 Noninverting Input Operational Amplifier 1 Output GON Low-Level Regulation Set-Point Input. Connect THR to the center of a resistive voltage-divider between AVDD and GND to set the V GON falling regulation level. The regulation level is 10 x VTHR. See the High-Voltage Switch Control section for details. High-Voltage Switch-Control Block Mode Selection Input and Timing-Adjustment Input. See the High-Voltage Switch Control section for details. MODE is high impedance when it is connected to VL. MODE is internally pulled to GND by a 10 resistor for 0.1s typical when the high-voltage switch-control block is enabled. High-Voltage Switch-Control Block Timing Control Input. See the High-Voltage Switch Control section for details. GON Output Enable. See the High-Voltage Switch Control section for details. Switch Input. Drain of the internal high-voltage p-channel MOSFET between DRN and GON. Internal High-Voltage MOSFET Switch Common Terminal. GON is the output of the high-voltage switch-control block. Switch Input. Source of the internal high-voltage p-channel MOSFET between SRC and GON. Positive Charge-Pump Regulator Feedback Input. Connect FBP to the center of a resistive voltagedivider between the positive charge-pump regulator output and GND to set the positive chargepump regulator output voltage. Place the resistive voltage-divider within 5mm to FBP. Charge Pump and Step-Down Regulator Power Ground Positive Charge-Pump Driver Output. Connect DRVP to the positive charge-pump flying capacitor(s). Supply Input for the Charge-Pump Drivers. Connect this pin to the output of the boost regulator SWI and bypass to CPGND with a 0.1F capacitor. Negative Charge-Pump Driver Output. Connect DRVN to the negative charge-pump flying capacitor(s). Analog Ground Negative Charge-Pump Regulator Feedback Input. Connect FBN to the center of a resistive voltage-divider between the negative output and REF to set the negative charge-pump regulator output voltage. Place the resistive voltage-divider within 5mm of FBN. Reference Output. Connect a 0.22F capacitor from REF to GND. All power outputs are disabled until REF exceeds its UVLO threshold. REF is active whenever VIN is above VIN UVLO threshold. Negative Charge-Pump Delay Input. Connect a capacitor from DEL1 and GND to set the delay time between the step-down output and the negative output. An 8A current source charges CDEL1. DEL1 is internally pulled to GND through 10 resistance when EN1 is low or VL is below its UVLO. No Connection. Not internally connected. Step-Down Regulator Output-Voltage Sense. Connect OUT to the step-down regulator output. Step-Down Regulator Feedback Input. Connect FB2 to GND to select the step-down converter's 3.3V fixed mode. For adjustable mode, connect FB2 to the center of a resistive voltage-divider between the step-down regulator output and GND to set the step-down regulator output voltage. Place the resistive voltage-divider within 5mm of FB2. Step-Down Regulator Bootstrap Capacitor Connection for High-Side Gate Driver. Connect a 0.1F ceramic capacitor from BST to LX2. FUNCTION
4
MODE
5 6 7 8 9 10 11 12 13 14 15, 34 16
CTL DLP DRN GON SRC FBP CPGND DRVP SUP DRVN GND FBN
17
REF
18 19 20
DEL1 N.C. OUT
21
FB2
22
BST
14
______________________________________________________________________________________
Low-Cost Multiple-Output Power Supply for LCD TVs
Pin Description (continued)
PIN 23, 24 NAME LX2 FUNCTION Step-Down Regulator Switching Node. LX2 is the source of the internal n-channel MOSFET connected between IN2 and LX2. Connect the inductor and Schottky catch diode close to both LX2 pins to minimize the trace area for low EMI. Step-Down Regulator Power Input. Drain of the internal n-channel MOSFET connected between IN2 and LX2. Input of the Internal 5V Linear Regulator and the Startup Circuitry. Bypass V IN to GND with 0.22F close to the IC. Frequency-Select Pin. Connect FSEL to GND for 600kHz operation. Connect to VL or VIN for 1.2MHz operation. Step-Up Regulator and Positive Charge-Pump Delay Input. Connect a capacitor from DEL2 and GND to set the delay time between EN2 and the startup of these regulators, or between the stepdown startup and the startup of these regulators if EN1 is high before the step-down starts. An 8A current source charges CDEL2. DEL2 is internally pulled to GND through 10 resistance when EN1 or EN2 is low or when VL is below its UVLO threshold. 5V Internal Linear Regulator Output. Bypass VL to GND with 1F minimum. Provides power for the internal MOSFET driving circuit, the PWM controllers, charge-pump regulators, logic, and reference and other analog circuitry. Provides 25mA load current when all switching regulators are enabled. VL is active whenever VIN is above VIN UVLO threshold. Compensation Pin for the Step-Up Error Amplifier. Connect a series resistor and capacitor from COMP to ground. Step-Up and Positive Charge-Pump Regulator Enable Input. Input HIGH also enables DEL2 pullup current. EN2 is inactive when EN1 is low. See the Power-Up Sequence section for details. Step-Down and Negative Charge-Pump Regulator Enable Input. Input HIGH also enables DEL1 pullup current. Step-Up Regulator Power Ground. Source of the internal power n-channel MOSFET. Step-Up Regulator Power MOSFET n-Channel Drain and Switching Node. Connect the inductor and Schottky catch diode to both LX1 pins and minimize the trace area for lowest EMI. Step-Up Regulator Internal p-Channel MOSFET Pass Switch Source Input. Connect to the cathode of the step-up regulator Schottky catch diode. Step-Up Regulator Internal p-Channel MOSFET Pass Switch Gate Input. Connect a capacitor from SUI to SWI to set the delay time. A 30A current source pulls down on C SUI when DEL2 is high. Boost Regulator Feedback Input. Connect FB1 to the center of a resistive voltage-divider between the boost regulator output and GND to set the boost regulator output voltage. Place the resistive voltage-divider within 5mm of FB1. Step-Up Regulator Internal p-Channel MOSFET Pass Switch Drain Output Operational Amplifier Power Input Operational Amplifier 2 Inverting Input Operational Amplifier 2 Noninverting Input Operational Amplifier Output 2 Operational Amplifier Power Ground Operational Amplifier 1 Inverting Input Exposed Paddle = GND
MAX17014
25, 26 27 28
IN2 VIN FSEL
29
DEL2
30
VL
31 32 33 35, 36 37, 38 39 40
COMP EN2 EN1 GND1 LX1 SWI SUI
41 42 43 44 45 46 47 48 EP
FB1 SWO OVIN NEG2 POS2 OUT2 OGND NEG1 GND
______________________________________________________________________________________
15
Low-Cost Multiple-Output Power Supply for LCD TVs MAX17014
VIN 12V 0.1F C3 10F 22 C4 0.1F 23 C5 22F L2 2.6H D2 FB1 41 31 COMP OUT FB2 OVIN VIN OGND 30 VL 28 FSEL 4 MODE 17 REF C8 0.22F 15 29 C9 0.1F 18 C10 0.15F STEP-DOWN, NEGATIVE CHARGE PUMP ON/OFF STEP-UP, POSITIVE CHARGE PUMP ON/OFF C11 0.15F 19 GOFF -6V 100mA D3 C12 1F R1 150k C13 0.1F 14 N.C. DRVP GND DEL2 POS1 47 1 R7 13.3k 43 C18 0.1F R5 82k C17 330pF LX2 24 LX2 L1 4.7H C1 10F C2 10F
25
26
35
36
37 LX1
38 LX1
SWI SUI SWO 39 40 42 C15 10F
D1 SWI C14 0.1F C24 10F AVDD 16V 1.5A R3 158k
IN2 IN2
BST
GND1 GND1
OUT 3.3V 2A
C16 10F
20 21
R4 13.3k
VIN C6 0.1F VL
27
AVDD R6 20k
C7 1F REF
POS2 45
MAX17014
THR NEG1 OUT1 NEG2 OUT2 CTL
3 48 2 44 46 5 7 R9 1k GON 35V 50mA SWI C19 0.1F C23 1F VCOM2 GON CONTROL VCOM1 R8 2.2k
DEL1
DRN
GON 33 EN1 32 6 SUP
8 13
EN2 DLP SRC
9 C20 0.1F D4 SRC
12
DRVN
C21 0.1F
C22 0.1F AVDD R16 367k
FBN 16
CPGND 11
EP
FBP 10
D5
49
R2 23k REF R17 13.3k
Figure 1. Typical Operating Circuit
16 ______________________________________________________________________________________
Low-Cost Multiple-Output Power Supply for LCD TVs
Typical Operating Circuit
The typical operating circuit (Figure 1) of the MAX17014 is a complete power-supply system for TFT LCD panels in monitors and TVs. The circuit generates a +3.3V logic supply, a +16V source driver supply, a +34.5V positive gate driver supply, and a -6V negative gate driver supply from a 12V 10% input supply. Table 1 lists some selected components and Table 2 lists the contact information for component suppliers.
Detailed Description
The MAX17014 is a multiple-output power supply designed primarily for TFT LCD panels used in monitors and TVs. It contains a step-down switching regulator to generate the logic supply rail, a step-up switching regulator to generate the source driver supply, and two charge-pump regulators to generate the gate driver supplies. Each regulator features adjustable output voltage, digital soft-start, and timer-delayed fault protection. Both the step-down and step-up regulators use a fixed-frequency current-mode control architecture. The two switching regulators are 180 out-of-phase to minimize the input ripple. The internal oscillator offers two pin-selectable frequency options (600kHz/1.2MHz), allowing users to optimize their designs based on the specific application requirements. The MAX17014 includes two high-performance operational amplifiers designed to drive the LCD backplane (VCOM). The amplifiers feature high output current (150mA), fast slew rate (100V/s), wide bandwidth (20MHz), and railto-rail inputs and outputs. In addition, the MAX17014 features a high-voltage switch-control block, an internal 5V linear regulator, a 1.25V reference output, welldefined power-up and power-down sequences, and thermal-overload protection. Figure 2 shows the MAX17014 functional diagram.
MAX17014
Table 1. Component List
DESIGNATION DESCRIPTION 10F 20%, 16V X5R ceramic capacitors (1206) Taiyo Yuden EMK325BJ106MD TDK C3225X7R1C106M 22F 10%, 6.3V X5R ceramic capacitor (1206) Taiyo Yuden JMK316BJ226KL Murata GRM31CR60J226M 10F 20%, 25V X5R ceramic capacitors (1210) TDK C3225X5R1E106M 3A, 30V Schottky diodes (M-Flat) Toshiba CMS02 (TE12L,Q) Central Semiconductor 200mA, 100V dual ultra-fast diodes (SOT23) Fairchild MMBD4148SE (top mark D4) Central Semiconductor CMPD1001S lead free (top mark L21) Low-profile 4.7H, 3.5A inductor (2mm height) TOKO FDV0620-4R7M Low-profile 2.4H, 2.6A inductor (1.8mm height) TOKO 1124BS-2R4M (2.4H) Wurth 744052002 (2.5H)
C1, C2, C3
C5
C15, C16, C24
D1, D2
Step-Down Regulator
The step-down regulator consists of an internal n-channel MOSFET with gate driver, a lossless current-sense network, a current-limit comparator, and a PWM controller block. The external power stage consists of a Schottky diode rectifier, an inductor, and output capacitors. The output voltage is regulated by changing the duty cycle of the n-channel MOSFET. A bootstrap circuit that uses a 0.1F flying capacitor between LX2 and BST provides the supply voltage for the high-side gate driver. Although the MAX17014 also includes a 10 (typ) low-side MOSFET, this switch is used to charge the bootstrap capacitor during startup and maintains fixed-frequency operation at light load and cannot be used as a synchronous rectifier. An external Schottky diode (D2 in Figure 1) is always required.
D3, D4, D5
L1
L2
Table 2. Component Suppliers
SUPPLIER Fairchild Semiconductor Sumida TDK Toshiba PHONE 408-822-2000 847-545-6700 847-803-6100 949-455-2000 FAX 408-822-2102 847-545-6720 847-390-4405 949-859-3963 WEBSITE www.fairchildsemi.com www.sumida.com www.component.tdk.com www.toshiba.com/taec
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17
Low-Cost Multiple-Output Power Supply for LCD TVs MAX17014
VIN (12V)
BST IN2 VL LX1 3.3V 2A
LX2
STEP-DOWN
OSC
STEP-UP GND1 FB1
CPGND OUT
COMP FSEL SWI P 150mV SWO SUI AVDD 16V 1.5A
VL
FB2 VIN VIN VL VL
OVIN POS1 NEG1 OUT1 OP AMPs
VL
POS2 NEG2 OUT2 OGND DRN THR MODE
REF
REF GND DEL1 DEL2
REF
STEP-DOWN, NEGATIVE CHARGE PUMP ON/OFF STEP-UP, POSITIVE CHARGE PUMP ON/OFF
EN1
POWER-UP SEQUENCE
HV SWITCH BLOCK
CTL GON SRC
EN2 DLP 50% OSC SUP SUP NEGATIVE REG DRVP
GON CONTROL VGON 35V 50mA SWI
VGOFF -6V 100mA
DRVN
POSITIVE REG
CPGND
FBN
FBP
CPGND AVDD
REF
Figure 2. Functional Diagram
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Low-Cost Multiple-Output Power Supply for LCD TVs
PWM Controller Block The heart of the PWM control block is a multi-input, open-loop comparator that sums three signals: the output voltage signal with respect to the reference voltage, the current-sense signal, and the slope compensation. The PWM controller is a direct-summing type, lacking a traditional error amplifier and the phase shift associated with it. This direct-summing configuration approaches ideal cycle-by-cycle control over the output voltage. When EN1 and EN2 are high, the controller always operates in fixed-frequency PWM mode. Each pulse from the oscillator sets the main PWM latch that turns on the high-side switch until the PWM comparator changes state.
When EN1 is high and EN2 is low, the controller operates in skip mode. The skip mode dramatically improves light-load efficiency by reducing the effective frequency, which reduces switching losses. It keeps the peak inductor current at about 0.9A (typ) in an active cycle, allowing subsequent cycles to be skipped. Skip mode transitions seamlessly to fixedfrequency PWM operation as load current increases. GND with the center tap connected to FB2 to adjust the output voltage. Choose RB (resistance from FB2 to GND) to be between 5k and 50k, and solve for RA (resistance from OUT1 to FB1) using the equation: V RA = RB x OUT - 1 VFB2 where VFB2 = 1.25V, and VOUT can vary from 1.25V to 5V. Because of FB2's (pin 21) close proximity to the noisy BST (pin 22), a noise filter is required for FB2 adjustable-mode operation. Place a 100pF capacitor from FB2 to GND to prevent unstable operation. No filter is required for 3.3V fixed-mode operation.
MAX17014
Soft-Start The step-down regulator includes a 7-bit soft-start DAC that steps its internal reference voltage from 0 to 1.25V in 128 steps. The soft-start period is 3ms (typ) and FB1 fault detection is disabled during this period. The soft-start feature effectively limits the inrush current during startup (see the Step-Down Regulator Soft-Start (Heavy Load) waveforms in the Typical Operating Characteristics).
Current Limiting and Lossless Current Sensing The current-limit circuit turns off the high-side MOSFET switch whenever the voltage across the high-side MOSFET exceeds an internal threshold. The actual current limit is 3A (typ).
For current-mode control, an internal lossless sense network derives a current-sense signal from the inductor DCR. The time constant of the current-sense network is not required to match the time constant of the inductor and has been chosen to provide sufficient current ramp signal for stable operation at both operating frequencies. The current-sense signal is AC-coupled into the PWM comparator, eliminating most DC outputvoltage variation with load current.
Step-Up Regulator
The step-up regulator employs a current-mode, fixedfrequency PWM architecture to maximize loop bandwidth and provide fast-transient response to pulsed loads typical of TFT LCD panel source drivers. The integrated MOSFET and the built-in digital soft-start function reduce the number of external components required while controlling inrush currents. The output voltage can be set from VVIN to 20V with an external resistive voltage-divider. The regulator controls the output voltage and the power delivered to the output by modulating the duty cycle (D) of the internal power MOSFET in each switching cycle. The duty cycle of the MOSFET is approximated by: V - VVIN D AVDD VAVDD where VAVDD is the output voltage of the step-up regulator.
Low-Frequency Operation The step-down regulator of the MAX17014 enters into low-frequency operating mode if the voltage on OUT is below 0.8V. In the low-frequency mode, the switching frequency of the step-down regulator is 1/6 the oscillator frequency. This feature prevents potentially uncontrolled inductor current if OUT is overloaded or shorted to ground. Dual-Mode Feedback The step-down regulator of the MAX17014 supports both fixed and adjustable output voltages. Connect FB2 to GND to enable the 3.3V fixed output voltage. Connect a resistive voltage-divider between OUT and
PWM Controller Block An error amplifier compares the signal at FB1 to 1.25V and changes the COMP output. The voltage at COMP sets the peak inductor current. As the load varies, the error amplifier sources or sinks current to the COMP output accordingly to produce the inductor peak current necessary to service the load. To maintain stability at high duty cycles, a slope compensation signal is summed with the current-sense signal.
______________________________________________________________________________________
19
Low-Cost Multiple-Output Power Supply for LCD TVs
On the rising edge of the internal clock, the controller sets a flip-flop, turning on the n-channel MOSFET and applying the input voltage across the inductor. The current through the inductor ramps up linearly, storing energy in its magnetic field. Once the sum of the currentfeedback signal and the slope compensation exceed the COMP voltage, the controller resets the flip-flop and turns off the MOSFET. Since the inductor current is continuous, a transverse potential develops across the inductor that turns on the diode (D1). The voltage across the inductor then becomes the difference between the output voltage and the input voltage. This discharge condition forces the current through the inductor to ramp back down, transferring the energy stored in the magnetic field to the output capacitor and the load. The MOSFET remains off for the rest of the clock cycle.
MAX17014
starts pulling down SUI with a 30A internal current source. The internal p-channel MOSFET turns on and connects the cathode of the step-up regulator Schottky catch diode to the step-up regulator load capacitors, when V SUI falls below the turn-on threshold of the MOSFET. When VSUI reaches (VSWI - 5V), the step-up regulator and the positive charge pump are enabled and initiate a soft-start routine.
Step-Up Regulator Internal p-Channel MOSFET Pass Switch The MAX17014 includes an integrated 120m highvoltage p-channel MOSFET to allow true shutdown of the step-up converter output (AVDD). This switch is typically connected in series between the step-up regulator's Schottky catch diode and its output capacitors. In addition to allowing step-up output to discharge completely when disabled, this switch also controls the startup inrush current into the step-up regulator's output capacitors. When EN2 is low, SUI is internally pulled up to SWI through an internal 1k resistor. Once EN2 is high and the step-down regulator is in regulation, the MAX17014
Soft-Start The step-up regulator achieves soft-start by linearly ramping up its internal current limit. The soft-start terminates when the output reaches regulation or the full current limit has been reached. The current limit rises from zero to the full current limit in approximately 3ms. The soft-start feature effectively limits the inrush current during startup (see the Step-Up Regulator Soft-Start (Heavy Load) waveforms in the Typical Operating Characteristics).
Positive Charge-Pump Regulator
The positive charge-pump regulator is typically used to generate the positive supply rail for the TFT LCD gate driver ICs. The output voltage is set with an external resistive voltage-divider from its output to GND with the midpoint connected to FBP. The number of chargepump stages and the setting of the feedback divider determine the output voltage of the positive chargepump regulator. The charge pump includes a high-side p-channel MOSFET (P1) and a low-side n-channel MOSFET (N1) to control the power transfer as shown in Figure 3.
INPUT SUPPLY
MAX17014
OSC P1
SUP C19 C21 C22
ERROR AMPLIFIER REF 1.25V
DRVP C20 N1 GNDP D5 C23 OUTPUT
POSITIVE CHARGE-PUMP REGULATOR
FBP
Figure 3. Positive Charge-Pump Regulator Block Diagram
20 ______________________________________________________________________________________
Low-Cost Multiple-Output Power Supply for LCD TVs
During the first half-cycle, N1 turns on and charges flying capacitors C20 and C21 (Figure 3). During the second half cycle, N1 turns off and P1 turns on, level shifting C20 and C21 by V SUP volts. If the voltage across C23 plus a diode drop (VOUT + VD) is smaller than the level-shifted flying capacitor voltage (VC20 + VSUP), charge flows from C20 to C23 until the diode (D5) turns off. The amount of charge transferred to the output is determined by the error amplifier that controls N1's on-resistance. The positive charge-pump regulator's startup can be delayed by connecting an external capacitor from DEL2 to GND. An internal constant-current source begins charging the DEL2 capacitor when EN2 is logichigh, and the step-down regulator reaches regulation. When the DEL2 voltage exceeds V REF, the positive charge-pump regulator is enabled. Each time it is enabled, the positive charge-pump regulator goes through a soft-start routine by ramping up its internal reference voltage from 0 to 1.25V in 128 steps. The soft-start period is 3ms (typ) and FBP fault detection is disabled during this period. The soft-start feature effectively limits the inrush current during startup. resistive voltage-divider from its output to REF with the midpoint connected to FBN. The number of chargepump stages and the setting of the feedback divider determine the output of the negative charge-pump regulator. The charge-pump controller includes a high-side p-channel MOSFET (P2) and a low-side n-channel MOSFET (N2) to control the power transfer as shown in Figure 4. During the first half cycle, P2 turns on, and flying capacitor C13 charges to VSUP minus a diode drop (Figure 4). During the second half cycle, P2 turns off, and N2 turns on, level shifting C13. This connects C13 in parallel with reservoir capacitor C12. If the voltage across C12 minus a diode drop is greater than the voltage across C13, charge flows from C12 to C13 until the diode (D3) turns off. The amount of charge transferred from the output is determined by the error amplifier, which controls N2's on-resistance. The negative charge-pump regulator is enabled when EN1 is logic-high and the step-down regulator reaches regulation. Each time it is enabled, the negative charge-pump regulator goes through a soft-start routine by ramping down its internal reference voltage from 1.25V to 250mV in 102 steps. The soft-start period is 3ms (typ) and FBN fault detection is disabled during this period. The soft-start feature effectively limits the inrush current during startup.
MAX17014
Negative Charge-Pump Regulator
The negative charge-pump regulator is typically used to generate the negative supply rail for the TFT LCD gate driver ICs. The output voltage is set with an external
INPUT SUPPLY
MAX17014
OSC P2
IN
ERROR AMPLIFIER REF 0.25V
DRVN
C13
D3 OUTPUT N2 C12 GND1 R1 REF R2
NEGATIVE CHARGE-PUMP REGULATOR
FBN
Figure 4. Negative Charge-Pump Regulator Block Diagram
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21
Low-Cost Multiple-Output Power Supply for LCD TVs MAX17014
High-Voltage Switch Control
The MAX17014's high-voltage switch control block (Figure 5) consists of two high-voltage p-channel MOSFETs: Q1, between SRC and GON and Q2, between GON and DRN. The switch control block is enabled when VDLP exceeds VREF. Q1 and Q2 are controlled by CTL and MODE. There are two different modes of operation (see the Typical Operating Characteristics).
REF
SWITCH CONTROL
8A DLP Q4 FAULT SHDN SUI DONE
MAX17014
SRC VREF Q1
GON VL /2 50A VL R Q5 R Q2 6k 9R
DRN THR
2R
MODE R 1.25k
Q3
CTL
Figure 5. Switch Control
22 ______________________________________________________________________________________
Low-Cost Multiple-Output Power Supply for LCD TVs
Select the first mode by connecting MODE to VL. When CTL is logic-high, Q1 turns on and Q2 turns off, connecting GON to SRC. When CTL is logic-low, Q1 turns off and Q2 turns on, connecting GON to DRN. GON can then be discharged through a resistor connected between DRN and GND or AV DD . Q2 turns off and stops discharging GON when VGON reaches 10 times the voltage on THR. When VMODE is less than 0.8 x VVL, the switch control block works in the second mode. The rising edge of VCTL turns on Q1 and turns off Q2, connecting GON to SRC. An internal n-channel MOSFET, Q3, between MODE and GND is also turned on to discharge an external capacitor between MODE and GND. The falling edge of VCTL turns off Q3, and an internal 50A current source starts charging the MODE capacitor. Once VMODE exceeds VVL/4, the switch control block turns off Q1 and turns on Q2, connecting GON to DRN. GON can then be discharged through a resisor connected between DRN and GND or AVDD. Q2 turns off and stops discharging GON when VGON reaches 10 times the voltage on THR. The switch control block is disabled and DLP is held low when EN1 or EN2 is low or the IC is in a fault state.
Operational Amplifiers
The MAX17014 has two operational amplifiers. The operational amplifiers are typically used to drive the LCD backplane (VCOM) or the gamma-correction divider string. They feature 150mA output short-circuit current, 100V/s slew rate, and 20MHz, -3dB bandwidth. While the op amp is a rail-to-rail input and output design, its accuracy is significantly degraded for input voltages within 2V of its supply rails (OVIN, OGND).
MAX17014
Short-Circuit Current Limit and Input Clamp The operational amplifiers limit short-circuit current to approximately 150mA (-250mA) if the output is directly shorted to OVIN (OGND). If the short-circuit condition persists, the junction temperature of the IC rises until it reaches the thermal-shutdown threshold (+160C typ). Once the junction temperature reaches the thermalshutdown threshold, an internal thermal sensor immediately sets the thermal-fault latch, shutting off all the IC's outputs. The device remains inactive until the input voltage is cycled. The operational amplifiers have 4V input clamp structures in series with a 500 resistance (Figure 6).
MAX17014
OVIN
POS1
POS2
4V
4V
500
NEG1
500
NEG2
OUT1
OUT2
OGND OP AMP INPUT CLAMP STRUCTURE
Figure 6. Op Amp Input Clamp Structure
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23
Low-Cost Multiple-Output Power Supply for LCD TVs
Driving Pure Capacitive Load The operational amplifiers are typically used to drive the LCD backplane (VCOM) or the gamma-correction divider string. The LCD backplane consists of a distributed series capacitance and resistance, a load that can be easily driven by the operational amplifier. However, if the operational amplifier is used in an application with a pure capacitive load, steps must be taken to ensure stable operation. As the operational amplifier's capacitive load increases, the amplifier's bandwidth decreases and gain peaking increases. A 5 to 50 small resistor placed between OUT_ and the capacitive load reduces peaking, but also reduces the gain. An alternative method of reducing peaking is to place a series RC network (snubber) in parallel with the capacitive load. The RC network does not continuously load the output or reduce the gain. Typical values of the resistor are between 100 and 200, and the typical value of the capacitor is 10nF.
MAX17014
Power-Up Sequence
The step-down regulator starts up when the MAX17014's internal reference voltage (REF) is above its undervoltage lockout (UVLO) threshold and EN1 is logic-high. Once the step-down regulator reaches regulation, the FB2 fault-detection circuit and the negative chargepump delay block are enabled. An 8A current source at DEL1 charges CDEL1 linearly. The negative chargepump regulator soft-starts when VDEL1 reaches VREF. FBN fault detection is enabled once the negative charge-pump soft-start is done. The step-up regulator, p-channel MOSFET pass switch, and positive charge-pump startup sequence begin when the step-down regulator reaches regulation and EN2 is logic-high. An 8A current source at DEL2 charges CDEL2 linearly and the p-channel MOSFET pass switch is enabled when VDEL2 reaches VREF. A 30A current source pulls down on SUI, slowly turning on the p-channel MOSFET switch between SWI and SWO. The step-up regulator, positive charge pump, and the delay block for the high-voltage switch starts when the SWI to SUI voltage difference (VSWI - VSUI) reaches the SUI-done threshold (5V, typ). An 8A current source charges C DLP linearly and when V DLP reaches VREF, the high-voltage switch is enabled and GON can be controlled by CTL. The FB1 fault-detection circuit is enabled after the stepup regulator reaches regulation, and similarly the FBP fault-detection circuit is enabled after the positive charge pump reaches regulation. For nondelayed startups, capacitors can be omitted from DEL1, DEL2, and DLP. When their current sources pull the floating pins above their thresholds, the associated outputs start.
Linear Regulator (VL)
The MAX17014 includes an internal linear regulator. VIN is the input of the linear regulator. The input voltage range is between 8V and 16.5V. The output voltage is set to 5V. The regulator powers the internal MOSFET drivers, PWM controllers, charge-pump regulators, and logic circuitry. The total external load capability is 25mA. Bypass VL to GND with a minimum 1F ceramic capacitor.
Reference Voltage (REF)
The reference output is nominally 1.25V, and can source at least 50A (see the Typical Operating Characteristics). VL is the input of the internal reference block. Bypass REF with a 0.22F ceramic capacitor connected between REF and GND.
Frequency Selection (FSEL)
The step-down regulator and step-up regulator use the same internal oscillator. The FSEL input selects the switching frequency. Table 3 shows the switching frequency based on the FSEL connection. High-frequency (1.2MHz) operation optimizes the application for the smallest component size, trading off efficiency due to higher switching losses. Low-frequency (600kHz) operation offers the best overall efficiency at the expense of component size and board space.
Power-Down Control
The MAX17014 disables the step-up regulator, positivecharge-pump regulator input switch control block, delay block, and high-voltage switch control block when EN2 is logic-low, or when the fault latch is set. The step-down regulator and negative charge-pump regulator are disabled only when EN1 is logic-low or when the fault latch is set.
Table 3. Frequency Selection
FSEL VIN GND SWITCHING FREQUENCY (kHz) 1200 600
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Low-Cost Multiple-Output Power Supply for LCD TVs MAX17014
VIN EN1 VL/REF DEL1 BUCK OUTPUT REF tSS TIME
VIN UVLO
tSS
NEGATIVE CHARGE-PUMP REGULATOR OUTPUT EN2 DEL2
REF
DEL2 STARTS CHARGING WHEN EN2 IS HIGH AND THE BUCK SOFT-START IS FINISHED.
TIME
POSITIVE CHARGE-PUMP REGULATOR OUTPUT
AVDD SUI SUI_DONE
tSS
TIME DLP
REF TIME VGON DEPENDS ON CTL
VGON FLOATING
VGON TIME
Figure 7. Power-Up Sequence
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Low-Cost Multiple-Output Power Supply for LCD TVs MAX17014
Fault Protection
During steady-state operation, if any output of the four regulators (step-down regulator, step-up regulator, positive charge-pump regulator, and negative chargepump regulator) does not exceed its respective faultdetection threshold, the MAX17014 activates an internal fault timer. If any condition or the combination of conditions indicates a continuous fault for the fault timer duration (50ms, typ), the MAX17014 triggers a nonlatching output undervoltage fault. After triggering, the MAX17014 turns off for 160ms (typ) and then restarts according to the EN1 and EN2 logic states. If, after restarting, another 50ms fault timeout occurs, the MAX17014 shuts down for 160ms again, and then restarts. The restart sequence is repeated 3 times and after the 50ms fault timeout, the MAX17014 shuts down and latches off. Once the fault condition is removed, toggle either EN1 or EN2, or cycle the input voltage to clear the fault latch and restart the supplies. connected to VL or 0.6MHz when FSEL is connected to GND. The exact inductor value is not critical and can be adjusted to make trade-offs among size, cost, and efficiency. Lower inductor values minimize size and cost, but they also increase the output ripple and reduce the efficiency due to higher peak currents. On the other hand, higher inductor values increase efficiency, but at some point resistive losses due to extra turns of wire exceed the benefit gained from lower AC current levels. The inductor's saturation current must exceed the peak inductor current. The peak current can be calculated by: VOUT x (VVIN - VOUT ) IOUT _ RIPPLE = fSW x L OUT x VVIN IOUT _ PEAK = IOUT(MAX) + IOUT _ RIPPLE 2
Thermal-Overload Protection
The thermal-overload protection prevents excessive power dissipation from overheating the MAX17014. When the junction temperature exceeds TJ = +160C, a thermal sensor immediately activates the fault protection, which shuts down all the outputs except the reference and latches off, allowing the device to cool down. Once the device cools down by at least approximately 15C, cycle the input voltage to clear the fault latch and restart the MAX17014. The thermal-overload protection protects the controller in the event of fault conditions. For continuous operation, do not exceed the absolute maximum junction temperature rating of TJ = +150C.
The inductor's DC resistance should be low for good efficiency. Find a low-loss inductor having the lowest possible DC resistance that fits in the allotted dimensions. Ferrite cores are often the best choice. Shieldedcore geometries help keep noise, EMI, and switching waveform jitter low. Considering the typical operating circuit in Figure 1, the maximum load current (IOUT(MAX)) is 2A with a 3.3V output and a typical 12V input voltage. Choosing an LIR of 0.4 at this operating point: L OUT = 12V x 1.2MHz x 2A x 0.4 3.3V x (12V - 3.3V ) 2.6H
Design Procedure
Step-Down Regulator
Inductor Selection Three key inductor parameters must be specified: inductance value (L), peak current (IPEAK), and DC resistance (RDC). The following equation includes a constant, LIR, which is the ratio of peak-to-peak inductor ripple current to DC load current. A higher LIR value allows smaller inductance, but results in higher losses and higher ripple. A good compromise between size and losses is typically found at about 20% to 50% ripple-current to load-current ratio (LIR):
L OUT = VIN x fSW x IOUT(MAX) x LIR VOUT x (VIN - VOUT )
At that operating point, the ripple current and the peak current are: 3.3V x (12V - 3.3V ) IOUT _ RIPPLE = 0.77A 1.2MHz x 2.6H x 12 IOUT _ PEAK = 2A + 0.77A = 2.39A 2
Input Capacitors The input filter capacitors reduce peak currents drawn from the power source and reduce noise and voltage ripple on the input caused by the regulator's switching. They are usually selected according to input ripple current requirements and voltage rating, rather than capacitance value. The input voltage and load current determine the RMS input ripple current (IRMS):
IRMS = IOUT x VOUT x (VVIN - VOUT ) VVIN
where IOUT(MAX) is the maximum DC load current, and the switching frequency fSW is 1.2MHz when FSEL is
26
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Low-Cost Multiple-Output Power Supply for LCD TVs
The worst case is IRMS = 0.5 x IOUT, which occurs at VVIN = 2 x VOUT. For most applications, ceramic capacitors are used because of their high ripple current and surge current capabilities. For optimal circuit long-term reliability, choose an input capacitor that exhibits less than +10C temperature rise at the RMS input current corresponding to the maximum load current. response. Calculating the ideal transient response of the inductor and capacitor, which assumes an ideal response from the regulator, can ensure that these components do not degrade the IC's natural response. The ideal undershoot and overshoot have two components: the voltage steps caused by ESR, and the voltage sag and soar due to the finite capacitance and the inductor current slew rate. Use the following formulas to check if the ESR is low enough and the output capacitance is large enough to prevent excessive soar and sag. The amplitude of the ESR step is a function of the load step and the ESR of the output capacitor: VOUT _ ESR _ STEP = IOUT x RESR _ OUT The amplitude of the capacitive sag is a function of the load step, the output capacitor value, the inductor value, the input-to-output voltage differential, and the maximum duty cycle: VOUT _ SAG = L OUT x (IOUT )2 2 x COUT x VVIN(MIN) x DMAX - VOUT
MAX17014
Output Capacitor Selection Since the MAX17014's step-down regulator is internally compensated, it is stable with any reasonable amount of output capacitance. However, the actual capacitance and equivalent series resistance (ESR) affect the regulator's output ripple voltage and transient response. The rest of this section deals with how to determine the output capacitance and ESR needs according to the ripple-voltage and load-transient requirements. The output voltage ripple has two components: variations in the charge stored in the output capacitor, and the voltage drop across the capacitor's ESR caused by the current into and out of the capacitor:
VOUT _ RIPPLE = VOUT _ RIPPLE(ESR) + VOUT _ RIPPLE(C) VOUT _ RIPPLE(ESR) = IOUT _ RIPPLE x RESR _ OUT VOUT _ RIPPLE(C) = IOUT _ RIPPLE 8 x COUT x fSW
(
)
The amplitude of the capacitive soar is a function of the load step, the output capacitor value, the inductor value, and the output voltage: x (IOUT )2 L VOUT _ SOAR = OUT 2 x COUT x VOUT Keeping the full-load overshoot and undershoot less than 3% ensures that the step-down regulator's natural integrator response dominates. Given the component values in the circuit of Figure 1 and assuming a full 2A step load transient, the voltage step due to capacitor ESR is negligible. The voltage sag and soar are 44.3mV and 71.6mV, or a little over 1% and 2%, respectively.
where IOUT_RIPPLE is defined in the Inductor Selection of the Step-Down Regulator section, COUT is the output capacitance, and RESR_OUT is the ESR of the output capacitor COUT. In Figure 1's circuit, the inductor ripple current is 0.77A. If the voltage-ripple requirement of Figure 1's circuit is 1% of the 3.3V output, then the total peak-to-peak ripple voltage should be less than 66mV. Assuming that the ESR ripple and the capacitive ripple each should be less than 50% of the total peakto-peak ripple, then the ESR should be less than 43m and the output capacitance should be more than 2.43F to meet the total ripple requirement. A 22F capacitor with ESR (including PCB trace resistance) of 10m is selected for the standard application circuit in Figure 1, which easily meets the voltage-ripple requirement. The step-down regulator's output capacitor and ESR can also affect the voltage undershoot and overshoot when the load steps up and down abruptly. The step-down regulator's transient response is typically dominated by its loop response and the time constant of its internal integrator. However, excessive inductance or insufficient output capacitance can degrade the natural transient
Rectifier Diode The MAX17014's high switching frequency demands a high-speed rectifier. Schottky diodes are recommended for most applications because of their fast recovery time and low forward voltage. In general, a 2A Schottky diode works well in the MAX17014's step-down regulator.
Step-Up Regulator
Inductor Selection The inductance value, peak current rating, and series resistance are factors to consider when selecting the inductor. These factors influence the converter's efficiency, maximum output load capability, transient response time, and output voltage ripple. Physical size and cost are also important factors to be considered.
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Low-Cost Multiple-Output Power Supply for LCD TVs
The maximum output current, input voltage, output voltage, and switching frequency determine the inductor value. Very high inductance values minimize the current ripple and therefore reduce the peak current, which decreases core losses in the inductor and I2R losses in the entire power path. However, large inductor values also require more energy storage and more turns of wire, which increase physical size and can increase I2R losses in the inductor. Low inductance values decrease the physical size but increase the current ripple and peak current. Finding the best inductor involves choosing the best compromise among circuit efficiency, inductor size, and cost. The equations used here include a constant, LIR, which is the ratio of the inductor peak-to-peak ripple current to the average DC inductor current at the full-load current. The best trade-off between inductor size and circuit efficiency for step-up regulators generally has an LIR between 0.2 and 0.5. However, depending on the AC characteristics of the inductor core material and ratio of inductor resistance to other power path resistances, the best LIR can shift up or down. If the inductor resistance is relatively high, more ripple can be accepted to reduce the number of turns required and increase the wire diameter. If the inductor resistance is relatively low, increasing inductance to lower the peak current can decrease losses throughout the power path. If extremely thin high-resistance inductors are used, as is common for smaller LCD panel applications, the best LIR can increase to between 0.5 and 1.0. Once a physical inductor is chosen, higher and lower values of the inductor should be evaluated for efficiency improvements in typical operating regions. Calculate the approximate inductor value using the typical input voltage (VVIN), the maximum output current (IAVDD(MAX)), the expected efficiency (TYP) taken from an appropriate curve in the Typical Operating Characteristics, and an estimate of LIR based on the above discussion:
2 VVIN VAVDD - VVIN TYP L AVDD = VAVDD IAVDD(MAX) x fSW LIR
MAX17014
Calculate the ripple current at that operating point and the peak current required for the inductor: IAVDD _ RIPPLE = VVIN(MIN) x VAVDD - VVIN(MIN) L AVDD x VAVDD x fSW IAVDD _ RIPPLE 2
(
)
IAVDD _ PEAK = IVIN(DCMAX) + ,
The inductor's saturation current rating and the MAX17014's LX1 current limit should exceed IAVDD_PEAK and the inductor's DC current rating should exceed IVIN(DC,MAX). For good efficiency, choose an inductor with less than 0.05 series resistance. Considering the typical operating circuit in Figure 1, the maximum load current (IAVDD(MAX)) is 1.5A with a 16V output and a typical 12V input voltage. Choosing an LIR of 0.25 and estimating efficiency of 90% at this operating point: 12V 16V - 12V 0.90 L AVDD = 4.7H 16V 1.5A x 1.2MHz 0.25 Using the circuit's minimum input voltage (10.8V) and estimating efficiency of 90% at that operating point: IVIN(DCMAX) = , 1.5A x 16V 2.47A 10.8V x 0.9
2
The ripple current and the peak current are: IRIPPLE = 4.7H x 16V x 1.2MHz 10.8V x (16V - 10.8V ) 0.62A
IPEAK = 2.47A +
0.62A 2.78A 2
Output Capacitor Selection The total output voltage ripple has two components: the capacitive ripple caused by the charging and discharging of the output capacitance, and the ohmic ripple due to the capacitor's ESR:
VAVDD _ RIPPLE = VAVDD _ RIPPLE(C) + VAVDD _ RIPPLE(ESR)
Choose an available inductor value from an appropriate inductor family. Calculate the maximum DC input current at the minimum input voltage VVIN(MIN) using conservation of energy and the expected efficiency at that operating point (MIN) taken from an appropriate curve in the Typical Operating Characteristics: IVIN(DCMAX) = , IAVDD(MAX) x VAVDD VVIN(MIN) x MIN
V I - VVIN VAVDD _ RIPPLE(C) AVDD AVDD C AVDD VAVDDfSW and: VAVDD _ RIPPLE(ESR) IAVDD _ PEAKRESR _ AVDD
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Low-Cost Multiple-Output Power Supply for LCD TVs
where IAVDD_PEAK is the peak inductor current (see the Inductor Selection section). For ceramic capacitors, the output voltage ripple is typically dominated by VAVDD_RIPPLE(C). The voltage rating and temperature characteristics of the output capacitor must also be considered. Note that all ceramic capacitors typically have large temperature coefficient and bias voltage coefficients. The actual capacitor value in circuit is typically significantly less than the stated value.
MAX17014
RCOMP
125 x VVIN x VAVDD x CAVDD L AVDD x IAVDD(MAX) VAVDD x CAVDD 1250 x IAVDD(MAX) x RCOMP
CCOMP
Input Capacitor Selection The input capacitor reduces the current peaks drawn from the input supply and reduces noise injection into the IC. A 22F ceramic capacitor is used in the typical operating circuit (Figure 1) because of the high source impedance seen in typical lab setups. Actual applications usually have much lower source impedance since the step-up regulator often runs directly from the output of another regulated supply. Typically, the input capacitance can be reduced below the values used in the typical operating circuit. Rectifier Diode The MAX17014's high switching frequency demands a high-speed rectifier. Schottky diodes are recommended for most applications because of their fast recovery time and low forward voltage. In general, a 2A Schottky diode complements the internal MOSFET well. Output-Voltage Selection The output voltage of the step-up regulator can be adjusted by connecting a resistive voltage-divider from the output (VAVDD) to GND with the center tap connected to FB1 (see Figure 1). Select R4 in the 10k to 50k range. Calculate R3 with the following equation:
V R3 = R4 x AVDD - 1 VFB1 where VFB1, the step-up regulator's feedback set point, is 1.25V. Place R4 and R3 close to the IC.
To further optimize transient response, vary RCOMP in 20% steps and CCOMP in 50% steps while observing transient response waveforms.
Charge-Pump Regulators
Selecting the Number of Charge-Pump Stages For highest efficiency, always choose the lowest number of charge-pump stages that meet the output requirement. The number of positive charge-pump stages is given by:
V +V - VAVDD nPOS = GON DROPOUT VSUP - 2 x VD where nPOS is the number of positive charge-pump stages, VGON is the output of the positive charge-pump regulator, VSUP is the supply voltage of the chargepump regulators, VD is the forward voltage drop of the charge-pump diode, and V DROPOUT is the dropout margin for the regulator. Use VDROPOUT = 300mV. The number of negative charge-pump stages is given by: nNEG = -VGOFF + VDROPOUT VSUP - 2 x VD
Loop Compensation Choose RCOMP (R5 in Figure 1) to set the high-frequency integrator gain for fast transient response. Choose CCOMP (C17 in Figure 1) to set the integrator zero to maintain loop stability. For low-ESR output capacitors, use the following equations to obtain stable performance and good transient response:
where nNEG is the number of negative charge-pump stages and VGOFF is the output of the negative chargepump regulator. The above equations are derived based on the assumption that the first stage of the positive charge pump is connected to VAVDD and the first stage of the negative charge pump is connected to ground. Sometimes fractional stages are more desirable for better efficiency. This can be done by connecting the first stage to VOUT or another available supply. If the first charge-pump stage is powered from VOUT, then the above equations become: V +V - VOUT nPOS = GON DROPOUT VSUP - 2 x VD nNEG = -VGOFF + VDROPOUT + VOUT VSUP - 2 x VD
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Low-Cost Multiple-Output Power Supply for LCD TVs
Flying Capacitors Increasing the flying capacitors (connected to DRVN and DRVP) value lowers the effective source impedance and increases the output-current capability. Increasing the capacitance indefinitely has a negligible effect on output-current capability because the internal switch resistance and the diode impedance place a lower limit on the source impedance. A 0.1F ceramic capacitor works well in most low-current applications. The flying capacitor's voltage rating must exceed the following: VCX > n x VSUP
where n is the stage number in which the flying capacitor appears.
MAX17014
PCB Layout and Grounding
Careful PCB layout is important for proper operation. Use the following guidelines for good PCB layout: * Minimize the area of respective high-current loops by placing each DC-DC converter's inductor, diode, and output capacitors near its input capacitors and its LX_ and GND_ pins. For the step-down regulator, the high-current input loop goes from the positive terminal of the input capacitor to the IC's IN pin, out of LX2, to the inductor, to the positive terminals of the output capacitors, reconnecting the output capacitor and input capacitor ground terminals. The high-current output loop is from the inductor to the positive terminals of the output capacitors, to the negative terminals of the output capacitors, and to the Schottky diode (D2). For the step-up regulator, the high-current input loop goes from the positive terminal of the input capacitor to the inductor, to the IC's LX1 pin, out of GND1, and to the input capacitor's negative terminal. The high-current output loop is from the positive terminal of the input capacitor to the inductor, to the output diode (D1), to the positive terminal of the output capacitors, reconnecting between the output capacitor and input capacitor ground terminals. Connect these loop components with short, wide connections. Avoid using vias in the high-current paths. If vias are unavoidable, use many vias in parallel to reduce resistance and inductance. Create a power ground island for the step-down regulator, consisting of the input and output capacitor grounds and the diode ground. Connect all these together with short, wide traces or a small ground plane. Similarly, create a power ground island (GND1) for the step-up regulator, consisting of the input and output capacitor grounds and the GND1 pin. Create a power ground island (CPGND) for the positive and negative charge pumps, consisting of SUP and output (SRC, VGOFF) capacitor grounds, and negative charge-pump diode ground. Connect CPGND ground plane to GND1 ground plane together with wide traces. Maximizing the width of the power ground traces improves efficiency and reduces output voltage ripple and noise spikes. * Create an analog ground plane (GND) consisting of the GND pin, all the feedback divider ground connections, the COMP and DEL capacitor ground connections, and the device's exposed backside pad. Connect GND1 and GND islands by connecting the two ground pins directly to the exposed backside pad. Make no other connections between the GND1 and GND ground planes.
Charge-Pump Output Capacitor Increasing the output capacitance or decreasing the ESR reduces the output ripple voltage and the peak-topeak transient voltage. With ceramic capacitors, the output voltage ripple is dominated by the capacitance value. Use the following equation to approximate the required capacitor value:
COUT _ CP ILOAD _ CP 2fOSCVRIPPLE _ CP
where COUT_CP is the output capacitor of the charge pump, I LOAD _ CP is the load current of the charge pump, and VRIPPLE_CP is the peak-to-peak value of the output ripple.
Output Voltage Selection Adjust the positive charge-pump regulator's output voltage by connecting a resistive voltage-divider from the SRC output to GND with the center tap connected to FBP (Figure 1). Select the lower resistor of divider R17 in the 10k to 30k range. Calculate the upper resistor, R16, with the following equation:
V R17 = R16 x GON - 1 VFBP where VFBP = 1.25V (typ). Adjust the negative charge-pump regulator's output voltage by connecting a resistive voltage-divider from VGOFF to REF with the center tap connected to FBN (Figure 1). Select R2 in the 20k to 50k range. Calculate R1 with the following equation: V -V R1 = R2 x FBN GOFF VREF - VFBN where VFBN = 250mV, VREF = 1.25V. Note that REF can only source up to 50A, using a resistor less than 20k for R1 results in higher bias current than REF can supply.
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Low-Cost Multiple-Output Power Supply for LCD TVs
* Place all feedback voltage-divider resistors as close to their respective feedback pins as possible. The divider's center trace should be kept short. Placing the resistors far away causes their FB traces to become antennas that can pick up switching noise. Care should be taken to avoid running any feedback trace near LX1, LX2, DRVP, or DRVN. Place VIN pin, VL pin, and REF pin bypass capacitors as close to the device as possible. The ground connection of the VL bypass capacitor should be connected directly to the GND pin with a wide trace. * Minimize the length and maximize the width of the traces between the output capacitors and the load for best transient responses. Minimize the size of the LX1 and LX2 nodes while keeping them wide and short. Keep the LX1 and LX2 nodes away from feedback nodes (FB1, FB2, FBP, and FBN) and analog ground. Use DC traces as a shield, if necessary.
MAX17014
*
*
Refer to the MAX17014 evaluation kit for an example of proper board layout.
Simplified Operating Circuit
VIN
IN2 IN2
BST
GND1 GND1
LX1 LX1 SWI
SUI SWO
SWI
OUT LX2 LX2
AVDD
FB1 COMP OUT FB2 VIN OVIN OGND VL VL FSEL MODE REF REF THR POS2 POS1 AVDD
VIN
MAX17014
GND DEL1
NEG1 OUT1 NEG2 OUT2 CTL
VCOM1 VCOM2 GON CONTROL
DEL2
DRN GON SUP GON SWI
ON/OFF ON/OFF
EN1 EN2 DLP
SRC DRVP
SRC
GOFF DRVN
FBN CPGND EP REF FBP AVDD
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31
Low-Cost Multiple-Output Power Supply for LCD TVs MAX17014
Pin Configuration
GND1 GND1 DEL2 FSEL GND
EN1
EN2
IN2
36 35 34 33 32 31 30 29 28 27 26 25 LX1 LX1 SWI SUI FB1 SWO OVIN NEG2 POS2 OUT2 OGND NEG1 37 38 39 40 41 42 43 44 45 46 47 48 1 POS1 2 OUT1 3 THR 4 MODE 5 CTL 6 DLP 7 DRN 8 GON 9 SRC 10 11 12 FBP CPGND DRVP 24 23 22 21 20 19 LX2 LX2 BST FB2 OUT N.C. DEL1 REF FBN GND DRVN SUP
MAX17014
IN2 18 17 16 15 14 13
THIN QFN (7mm x 7mm)
Chip Information
TRANSISTOR COUNT: 15,362 PROCESS: BiCMOS
32
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VIN
TOP VIEW
COMP
VL
Low-Cost Multiple-Output Power Supply for LCD TVs
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.)
MAX17014
E E/2
DETAIL A
(NE-1) X e
k e D/2
D
(ND-1) X e
C L
D2
D2/2
b L E2/2 k
C L
E2
C L
C L
L e e
L
A1
A2
A
PACKAGE OUTLINE 32, 44, 48, 56L THIN QFN, 7x7x0.8mm
21-0144
F
1
2
______________________________________________________________________________________
32, 44, 48L QFN.EPS
33
Low-Cost Multiple-Output Power Supply for LCD TVs MAX17014
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.)
PACKAGE OUTLINE 32, 44, 48, 56L THIN QFN, 7x7x0.8mm
21-0144
F
2
2
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 34
(c) 2007 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.

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